In computing systems, a memory controller can be thought of as an intermediary between a processor (e.g., central processing unit) and main memory (e.g., dynamic random access memory, i.e., DRAM) that prioritizes and schedules memory requests. Memory requests typically involve either a read request or a write request.
A memory controller schedules memory requests to memory based on a scheduling scheme, such as a first-in-first-out scheme. The memory can be system main memory or other memory, such as cache memory. Cache memory is much more quickly accessed by a central processor than system main memory. Accordingly, the more frequently the central processor can rely on cache memory for performing various memory operations, the better the performance in terms of latency and similar metrics